Su, Pin


蘇彬(Pin Su)

Office: ED531; Tel: 886-3-5712121 ext.54142
E-mail: pinsu@nycu.edu.tw



著作列表 (Publication List)


  • 美國加州柏克萊大學電機工程博士
  • 國立交通大學電子工程學系教授


  • Modeling, Design and Evaluation of Exploratory/Beyond-CMOS Devices for Logic and Memory Applications. These devices include FinFET/Multigate transistors, Stacked Nanowire/Nanosheet, High-Mobility III-V/Ge Channel devices, 2D-Material transistors, Negative-Capacitance FETs, Ferroelectric FETs, etc.


  • 矽奈米元件及物理 (研, Spring 2022)
  • 半導體物理及元件(一) (研, Spring 2023)
  • 計測實驗 (研, Spring 2023)
  • 半導體元件物理 (大三, Fall 2022)


        Pin Su has been a professor at Institute of Electronics, National Chiao Tung University (now National Yang Ming Chiao Tung University) since 2003. He received PhD degree from the Department of Electrical Engineering and Computer Sciences, University of California at Berkeley in 2002.
        Prof. Su has received teaching awards in 2015, 2019 and 2021 (EE college or University level), respectively. Twelve PhD students have completed their doctoral degrees under his supervision. His research interests have been primarily in modeling, design and evaluation of exploratory devices for logic and memory applications. His research work has been disseminated through over 100 refereed journal papers and over 190 conference papers and invited talks.
        Prof. Su has served as the technical committee member of IEDM (2012-2013), SSDM (2016-present) and EDTM (2017-2018). He shared the IEEE EDS Leo Esaki Award in 2021.