2018-12-04 10:31:10Patty Chen(2018.12.19)#TALK Reconfigurable Architectures for Dependability and Energy

 #TALK Reconfigurable Architectures for Dependability and Energy
#Welcome all to come~~~
#TIME December 19, 2018( Wednesday 10:30AM—12:00PM)
#VENUE R108,1F Engineering Building 4, NCTU
Prof. Hidetoshi Onodera
Dept. of Communications and Computer Engineering, Kyoto University
#HOST Prof. Hung-Ming Chen / Director, Institute of Electronics, NCTU
#Abstract : For an embedded application, an ASIC approach provides a significant amount of performance gain, both in speed and energy, over a  general-purpose processor approach in return for the loss of generality.   On the other hand, a reconfigurable circuit such as an FPGA could  achieve both of performance gain and generality with the proper design of  the reconfigurable architecture.  This talk covers two examples of such  reconfigurable architectures in our recent and current projects. The first architecture enhances dependability, especially soft-error resilience, with built-in adaptive redundancy.   Any part of the circuit can be configured with a different level of redundancy, and thereby a good trade-off between reliability and circuit scale can be achieved. The second architecture obtains high energy efficiency with the use of a "Via-switch" which performs as a programmable via.  A Via-switch  can be formed in BEOL without using FEOL devices.  Programmable interconnects,  which occupy considerable silicon area in a conventional FPGA, can be  a simple crossbar placed on top of logic blocks.   This overlay structure  enables a highly area-efficient reconfigurable device called Via-switch FPGA  with high energy efficiency.  A Proof-of-Concept Via-swith FPGA has been  designed and taped out for fabrication.

#Event website